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Hardware Description Languages for Logic Design

  • Verilog
  • Free tutorial
  • Rating: 4.0 out of 54.0 (115 ratings)
  • 2,433 students
  • 1hr 31min of on-demand video
  • Created by Kaithi Nirmalakumari

English

What you’ll learn

  • Basics of Verilog Programming

Requirements

  • Digital Logic Principles

Description

Verilog is a HARDWARE DESCRIPTION LANGUAGE (HDL). It is a language used for describing a digital system. Course is all about the history of the Verilog HDL language, an approach to learning Verilog, and a first phrase design example done three different ways showing the versatility of Verilog, the basics of Verilog syntax, Verilog variable values and data types, and some suggested editors that can be used to create Verilog code, how to use the assignment statements and also about the wide range of operators in Verilog and how they work, Verilog data types, what they mean and how to use them, and the difference between Nets and Registers, which are the two main data types found in Verilog, how to use modules as building blocks of Verilog circuit design descriptions, how to include an instance of another module within a module to build hierarchical designs, and two ways to instantiate a module, and which one is better, how to describe combinatorial circuits and Vera log and how to reduce Vector sizes using reduction operators, how to describe synchronous circuits in Verilog, and how to design flip-flops and latches in Verilog, how to describe basic sequence circuits and very log and how to design registers and counters in Barrel log, how to build bigger designs using modular design techniques, the use of loops in Verilog log, and how to use for Generate to make copies of circuits.

Read Also -->   Arduino Workshop 2018 | A step-by-step Arduino how-to guide

Who this course is for:

  • Beginner of VLSI Design

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Course content

5 sections • 9 lectures • 1h 30m total lengthCollapse all sections

Introduction1 lecture • 13min

  • First Verilog Phrase12:56

Verilog Syntax and Semantics4 lectures • 53min

  • Verilog Rules and Syntax11:47
  • Verilog Statements and Operators18:23
  • Verilog Port modes and Data types11:38
  • Verilog Structure11:34

Combinatorial Circuits1 lecture • 7min

  • Verilog examples for combinatioanl circuits07:05

Sequential Circuits2 lectures • 12min

  • Synchronous Circuits04:25
  • Synchronous sequential circuits07:13

Design in Verilog1 lecture • 6min

  • Modular Design in Verilog05:56

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